Monday, November 2, 2015

Atomics and the Memory Model in C++1x

One of the cool talks in this year's CppCon was the one by Michael Wong on Atomics:

There's nothing really new about this that I hadn't seen before, but it has a very good "round up" of all the main concepts related to this topic and explained in a clear and entertaining way. He's also an ex-physicist, so I'm biased  :)


This presentation covers things like:

- Why do we need a Memory Model;
- Why is memory_order_seq_cst not enough and we need also things like memory_order_relaxed, memory_order_acquire and memory_order_release;
- What is Sequential Consistency;
- Caches in modern CPUs;
- The speed of light is the maximum speed to transmit information, and what are the consequences of this;
- The difference between volatile and atomic<>;
- Sequential Consistency and Happens-Before;
- Relative strengths the different memory orders;

This last one was particularly interesting so I'm going to steal a snippet of his slide and show it here:

This is related to the reason why we get different performance benefits when using the different memory orders, like we showed at the end of this post.

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